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| FSLV16211 24-Bit Bus Switch March 2007 FSLV16211 24-Bit Bus Switch Features 5 switch connection between two ports Minimal propagation delay through the switch Low lCC Zero bounce in flow-through mode Packaged in Fine-Pitch Ball Grid Array (FBGA) and Thin Shrink Small Outline Package (TSSOP) Description The FSLV16211 is a 24-bit, high-speed, low-voltage bus switch. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. This device's design allows this part to be used as a 12bit or 24-bit bus switch. When OE1 is LOW, Port 1A is connected to Port 1B. When OE2 is LOW, Port 2A is connected to Port 2B. Ordering Information Part Number FSLV16211GX FSLV16211MTD Operating Pb-Free Temperature Range Yes Yes -40C to 85C Package 54-Ball, Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Packing Method Tape and Reel Trays 56-Lead, Thin Shrink Small Outline -40C to 85C Package (TSSOP), JEDEC M0-153, 6.1mm Wide 56-Lead, Thin Shrink Small Outline -40C to 85C Package (TSSOP), JEDEC M0-153, 6.1mm Wide FSLV16211MTDX Yes Tape and Reel Application Diagram Figure 1. Logic Diagram (c) 2003 Fairchild Semiconductor Corporation FSLV16211 Rev. 1.0.1 www.fairchildsemi.com FSLV16211 24-Bit Bus Switch Connection Diagram Pin Description Pin Name OE1, OE2 1A, 2A 1B, 2B NC Description Bus Switch Enables Bus A Bus B No Connect FBGA Pin Assignments 1 A B C D Figure 2. Pin Assignments for TSSOP (Top Through View) 1A2 1A4 1A6 1A10 1A12 2A4 2A6 2A8 2A12 2 1A1 1A3 1A5 1A9 1A11 2A3 2A5 2A7 2A11 3 NC 1A7 GND 1A8 2A1 2A2 VCC 2A9 2A10 4 OE2 OE1 1B7 1B8 2B1 2B2 GND 2B9 2B10 5 1B1 1B3 1B5 1B9 1B11 2B3 2B5 2B7 2B11 6 1B2 1B4 1B6 1B10 1B12 2B4 2B6 2B8 2B12 E F G H I Truth Table Inputs OE1 Figure 3. Pin Assignments for FBGA (Top Through View) Low Low High High OE2 Low High Low High Inputs/Outputs 1A,1B 1A=1B 1A=1B Z Z 2A, 2B 2A=2B Z 2A=2B Z (c) 2003 Fairchild Semiconductor Corporation FSLV16211 Rev. 1.0.1 www.fairchildsemi.com 2 FSLV16211 24-Bit Bus Switch Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCC VS VIN IIK IOUT ICC/IGNG TSTG Supply Voltage Parameter DC Switch Voltage DC Input Voltage DC Input Diode Current DC Output Sink Current DC VCC/GND Current Storage Temperature Range (1) Min. -0.5 -0.5 -0.5 Max. 4.6 4.6 4.6 -50 128 +/-100 Unit V V V mA mA mA C -65 150 Note: 1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.(2) Symbol VCC VIN VOUT tr, tf TA Input Voltage Output Voltage Parameter Power Supply Operating Min. 2.3 0 0 Max. 3.6 3.6 3.6 4.0 DC 85 Unit V V V ns/V ns/V C Input Rise and Fall Time Switch Control Input Switch I/O 0 0 -40 Free Air Operating Temperature Note: 2. Unused control inputs must be held HIGH or LOW. They may not float. (c) 2003 Fairchild Semiconductor Corporation FSLV16211 Rev. 1.0.1 www.fairchildsemi.com 3 FSLV16211 24-Bit Bus Switch DC Electrical Characteristics Not all conditions may appear on all switch types. Symbol VIK VIH VIL Parameter Clamp Diode Voltage HIGH Level Control Input Voltage LOW Level Control Input Voltage Conditions IIN = -18mA VCC (V) 3.0 2.3-2.7 2.7-3.6 2.3-2.7 2.7-3.6 TA = -40C to +85C Min. 1.7 2.0 0.7 0.8 10.0 10.0 1.0 10.0 300.0 -1.0 5.0 5.0 10.0 5.0 5.0 10.0 1.0 7.0 7.0 15.0 20.0 8.0 8.0 15.0 20.0 Units V V V Typ. Max. -1.2 IL Input Leakage Current Force VI = 3.6V, IOUT = 0.0A Force VI = 3.6V 0 VIN 3.6V VIN = VCC or GND, IOUT = 0A One Input at 3V Other Inputs at VCC or GND 0.0 A, B 3.6V IIN = 64mA, VI = 0.0V IIN = 30mA, VI = 0.0V IIN = 15mA, VI = 2.4V IIN = 15mA, VI = 3.0V IIN = 64mA, VI = 0.0V IIN = 30mA, VI = 0.0V IIN = 15mA, VI = 1.7V IIN = 15mA, VI = 2.0V 2.3 0.0 3.6 3.6 3.6 3.6 3.0 3.0 3.0 2.3 2.3 2.3 2.3 2.3 A ICC ICC IOZ Quiescent Supply Current Increase in ICC per Input Off-State Leakage A A A RON Switch On Resistance AC Electrical Characteristics TA=-40C to +85C Symbol Parameter CL=30pF, RL=500 VCC = 2.5V 0.20V Min. tPHL, tPLH tPHZ, tPLZ tPZH, tPZL Propagation Delay Enable Time Disable Time (3) TA=40C to +85C CL=50pF, RL=500 VCC=3.3V 0.30V Min. 1.0 1.0 Units Max. 0.15 4.7 5.1 Max. 0.25 7.0 5.5 ns ns ns 0.5 0.5 Note: 3. This parameter is guaranteed by design, but is not production tested. The bus switch contributes no propagation delay other than the RC delay of the typical on resistance of the switch and the load capacitance, when driven by an ideal voltage source (zero output impedance). (c) 2003 Fairchild Semiconductor Corporation FSLV16211 Rev. 1.0.1 www.fairchildsemi.com 4 FSLV16211 24-Bit Bus Switch Capacitance TA = +25C, f = 1MHz, unless otherwise noted. Symbols CIN CI/O Parameter Control Pin Input Capacitance Input/Output Capacitance Conditions VCC - 3.3V VCC,OE= 3.3V Min. Typ. 4.5 18.0 Max. Units pF pF Capacitance is characterized, but not production tested. AC Loading Waveforms TEST tPD tPLZ/tPZL tPHZ/tPZH SWITCH Open VIN GND Figure 4. AC Test Circuit Figure 5. AC Waveforms VCC Symbol VMI VMO VMVO VIN VCCV tr/tf 3.3V 0.3V 1.5V 1.5V 0.3V 6.0V 3.0V 2ns 2.5V 0.2V VCC/2 VCC/2 0.15V 2 x VCC VCC 2.5ns (c) 2003 Fairchild Semiconductor Corporation FSLV16211 Rev. 1.0.1 www.fairchildsemi.com 5 FSLV16211 24-Bit Bus Switch Physical Dimensions Dimensions are in millimeters unless otherwise noted. Figure 6. 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (c) 2003 Fairchild Semiconductor Corporation FSLV16211 Rev. 1.0.1 www.fairchildsemi.com 6 FSLV16211 24-Bit Bus Switch Physical Dimensions (Continued) Dimensions are in millimeters (inches) unless otherwise noted. Figure 7. 56-Lead Thin-Shrink Small Outline Package (TSSOP), JEDEC MO153, 6.1mm Wide (c) 2003 Fairchild Semiconductor Corporation FSLV16211 Rev. 1.0.1 www.fairchildsemi.com 7 FSLV16211 24-Bit Bus Switch (c) 2003 Fairchild Semiconductor Corporation FSLV16211 Rev. 1.0.1 www.fairchildsemi.com 8 |
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